RegViz: Visualize EESIPR Bitfield

Renesas Electronics /R7FA6M3AH /PTPEDMAC /EESIPR

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Interpret as EESIPR

TWBIP=0, FRIP=0, TDEIP=0, RFCOFIP=0, RDEIP=0, PVERIP=0, TFUFIP=0, RFOFIP=0, TABTIP=0, ADEIP=0, TCIP=0, MACEIP=0

Description

PTP/EDMAC Status Interrupt Enable Register

Fields

PVERIP	PTP v2 Packet Receive Interrupt Request Enable 0 (0): PTP v2 packet receive interrupt request is disabled. 1 (1): PTP v2 packet receive interrupt request is enabled.
MACEIP	MAC Address Mismatch Interrupt Request Enable 0 (0): This bit disables an interrupt request generated when the source MAC address of transmit frame data does not match the set value. 1 (1): This bit enables an interrupt request generated when the source MAC address of transmit frame data does not match the set value.
RFOFIP	Receive FIFO Overflow Interrupt Request Enable 0 (0): Overflow interrupt request is disabled. 1 (1): Overflow interrupt request is enabled.
RDEIP	Receive Descriptor Empty Interrupt Request Enable 0 (0): Receive descriptor empty interrupt request is disabled. 1 (1): Receive descriptor empty interrupt request is enabled.
FRIP	Frame Receive Interrupt Request Enable 0 (0): Frame receive interrupt request is disabled. 1 (1): Frame receive interrupt request is enabled.
TFUFIP	Transmit FIFO Underflow Interrupt Request Enable 0 (0): Underflow interrupt request is disabled. 1 (1): Underflow interrupt request is enabled.
TDEIP	Transmit Descriptor Empty Interrupt Request Enable 0 (0): Transmit descriptor empty interrupt request is disabled. 1 (1): Transmit descriptor empty interrupt request is enabled.
TCIP	Frame Transfer Complete Interrupt Request Enable 0 (0): Frame transmission complete interrupt request is disabled. 1 (1): Frame transmission complete interrupt request is enabled.
ADEIP	Address Error Interrupt Request Enable 0 (0): Address error interrupt request is disabled. 1 (1): Address error interrupt request is enabled.
RFCOFIP	Receive Frame Counter Overflow Interrupt Request Enable 0 (0): Receive frame counter overflow interrupt request is disabled. 1 (1): Receive frame counter overflow interrupt request is enabled.
TABTIP	Transmit Abort Detect Interrupt Request Enable 0 (0): Transmit abort detect interrupt request is disabled. 1 (1): Transmit abort detect interrupt request is enabled.
TWBIP	Write-Back Complete Interrupt Request Enable 0 (0): Write-back complete interrupt request is disabled. 1 (1): Write-back complete interrupt request is enabled.

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